Development of remote laboratory architectures for FPGA design education

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Abstract

The article presents various architectures of remote laboratories for accessing FPGA development boards. It discusses the key aspects of infrastructure design for shared remote access to FPGAs, focusing on security, modularity, adaptability, resource reservation, virtualization and containerization. The developed solutions facilitate remote access to laboratory equipment and are applicable both in education and in industry for debugging and validating IP blocks on FPGAs.

About the authors

A. A. Amerikanov

HSE University

Author for correspondence.
Email: aamerikanov@hse.ru
ORCID iD: 0000-0002-5970-2125

Ph.D., Associate Professor

Russian Federation, Moscow, 101000

V. M. Vinarskii

HSE University

Email: vmvinarskiy@edu.hse.ru
ORCID iD: 0009-0005-5319-6304

Student

Russian Federation, Moscow, 101000

L. G. Evtushenko

HSE University

Email: levtushenko@hse.ru
ORCID iD: 0000-0003-1261-9735

Assistant Professor

Russian Federation, Moscow, 101000

V. V. Zunin

HSE University

Email: vzunin@hse.ru
ORCID iD: 0000-0002-9117-4879

Senior Lecturer

Russian Federation, Moscow, 101000

I. I. Romanova

HSE University

Email: iromanova@hse.ru

Senior Lecturer

Russian Federation, Moscow, 101000

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