<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE root>
<article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:ali="http://www.niso.org/schemas/ali/1.0/" article-type="research-article" dtd-version="1.2" xml:lang="en"><front><journal-meta><journal-id journal-id-type="publisher-id">Informacionnye Tehnologii</journal-id><journal-title-group><journal-title xml:lang="en">Informacionnye Tehnologii</journal-title><trans-title-group xml:lang="ru"><trans-title>Информационные технологии</trans-title></trans-title-group></journal-title-group><issn publication-format="print">1684-6400</issn><publisher><publisher-name xml:lang="en">New Technologies Publishing House</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="publisher-id">702258</article-id><article-id pub-id-type="doi">10.17587/it.30.520-527</article-id><article-categories><subj-group subj-group-type="toc-heading" xml:lang="en"><subject>Cad-systems</subject></subj-group><subj-group subj-group-type="toc-heading" xml:lang="ru"><subject>Системы автоматизированного проектирования</subject></subj-group><subj-group subj-group-type="article-type"><subject>Research Article</subject></subj-group></article-categories><title-group><article-title xml:lang="en">Requirements for standard and I/O cell library domestic characterization system development</article-title><trans-title-group xml:lang="ru"><trans-title>Требования к разработке отечественной системы характеризации библиотек стандартных ячеек и ячеек ввода-вывода</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author"><name-alternatives><name xml:lang="en"><surname>Makarov</surname><given-names>G. N.</given-names></name><name xml:lang="ru"><surname>Макаров</surname><given-names>Г. Н.</given-names></name></name-alternatives><address><country country="RU">Russian Federation</country></address><bio xml:lang="en"><p>Research Engineer</p></bio><bio xml:lang="ru"><p>инженер-исследователь</p></bio><email>info@nm-tech.org</email><xref ref-type="aff" rid="aff1"/></contrib><contrib contrib-type="author"><name-alternatives><name xml:lang="en"><surname>Sorokin</surname><given-names>T. M.</given-names></name><name xml:lang="ru"><surname>Сорокин</surname><given-names>Т. М.</given-names></name></name-alternatives><address><country country="RU">Russian Federation</country></address><bio xml:lang="en"><p>Senior Design Engineer</p></bio><bio xml:lang="ru"><p>старший инженер-проектировщик</p></bio><email>info@nm-tech.org</email><xref ref-type="aff" rid="aff1"/></contrib><contrib contrib-type="author"><name-alternatives><name xml:lang="en"><surname>Kalashnikov</surname><given-names>V. S.</given-names></name><name xml:lang="ru"><surname>Калашников</surname><given-names>В. С.</given-names></name></name-alternatives><address><country country="RU">Russian Federation</country></address><bio xml:lang="en"><p>Ph.D., Head of Department</p></bio><bio xml:lang="ru"><p>канд. техн. наук, начальник отдела</p></bio><email>info@nm-tech.org</email><xref ref-type="aff" rid="aff1"/></contrib><contrib contrib-type="author"><name-alternatives><name xml:lang="en"><surname>Semenov</surname><given-names>M. Y.</given-names></name><name xml:lang="ru"><surname>Семенов</surname><given-names>М. Ю.</given-names></name></name-alternatives><address><country country="RU">Russian Federation</country></address><bio xml:lang="en"><p>Ph.D., Director</p></bio><bio xml:lang="ru"><p>канд. техн. наук, начальник центра</p></bio><email>info@nm-tech.org</email><xref ref-type="aff" rid="aff1"/></contrib><contrib contrib-type="author"><name-alternatives><name xml:lang="en"><surname>Tsarapkin</surname><given-names>S. F.</given-names></name><name xml:lang="ru"><surname>Царапкин</surname><given-names>С. Ф.</given-names></name></name-alternatives><address><country country="RU">Russian Federation</country></address><bio xml:lang="en"><p>Executive Director</p></bio><bio xml:lang="ru"><p>исполнительный директор</p></bio><email>info@nm-tech.org</email><xref ref-type="aff" rid="aff1"/></contrib><contrib contrib-type="author"><name-alternatives><name xml:lang="en"><surname>Gundartsev</surname><given-names>M. A.</given-names></name><name xml:lang="ru"><surname>Гундарцев</surname><given-names>М. А.</given-names></name></name-alternatives><address><country country="RU">Russian Federation</country></address><bio xml:lang="en"><p>Ph.D., Team Lead</p></bio><bio xml:lang="ru"><p>канд. техн. наук, руководитель направления</p></bio><email>info@nm-tech.org</email><xref ref-type="aff" rid="aff1"/></contrib></contrib-group><aff-alternatives id="aff1"><aff><institution xml:lang="en">LLC NM-Tech</institution></aff><aff><institution xml:lang="ru">ООО "НМ-Тех"</institution></aff></aff-alternatives><pub-date date-type="pub" iso-8601-date="2024-10-15" publication-format="electronic"><day>15</day><month>10</month><year>2024</year></pub-date><volume>30</volume><issue>10</issue><issue-title xml:lang="en"/><issue-title xml:lang="ru"/><fpage>520</fpage><lpage>527</lpage><history><date date-type="received" iso-8601-date="2026-02-06"><day>06</day><month>02</month><year>2026</year></date><date date-type="accepted" iso-8601-date="2026-02-06"><day>06</day><month>02</month><year>2026</year></date></history><permissions><copyright-statement xml:lang="en">Copyright ©; 2026, Informacionnye Tehnologii</copyright-statement><copyright-statement xml:lang="ru">Copyright ©; 2026, Информационные технологии</copyright-statement><copyright-year>2026</copyright-year><copyright-holder xml:lang="en">Informacionnye Tehnologii</copyright-holder><copyright-holder xml:lang="ru">Информационные технологии</copyright-holder></permissions><self-uri xlink:href="https://journals.eco-vector.com/1684-6400/article/view/702258">https://journals.eco-vector.com/1684-6400/article/view/702258</self-uri><abstract xml:lang="en"><p>The article is devoted to define requirements and discover specific features for domestic standard cell and I/O libraries characterization EDA tool. A general structure of the library characterization system is presented. The basic requirements indicted for the system are considered and analyzed in the article. A comparative analysis of correspondence to these requirements for domestic and foreign characterization tools is done. The specific features the domestic library characterization system should satisfy are formulated. Among the main features the following are outlined in the article: compatibility and support of domestic OS, support of well-known foreign and domestic Spice-simulators, Russian language support for documentation, scalability, ensuring confidence of the output data. A brief review of typical tasks, intrinsic for characterization tool development and corresponding algorithms, required for its resolving is given. The following issues along with appropriate proposals for its solution are mentioned: automated definition of optimal input waveforms for sequential cells initialization, searching for maximum capacitance load for the cell, setup and hold parameters calculation for sequential cells, method of optimal output current PWL approximation for CCS parameters calculation. As a conclusion of the investigation the current status of domestic characterization systems development is analyzed. In the outcome a problem of domestic library characterization tool that aligned with all the requirements and support the specific features defined above has been raised.</p></abstract><trans-abstract xml:lang="ru"><p>Рассмотрены и проанализированы основные требования, предъявляемые к САПР характеризации библиотек стандартных ячеек и ячеек ввода-вывода, проведен сравнительный анализ соответствия данным требованиям зарубежных и отечественных инструментов характеризации. Сформулированы требования и особенности, которым должна удовлетворять отечественная система характеризации библиотек, а также представлен обзор алгоритмов, применяемых при ее разработке.</p></trans-abstract><kwd-group xml:lang="en"><kwd>library characterization</kwd><kwd>standard cell</kwd><kwd>IO cell</kwd><kwd>EDA</kwd><kwd>Liberty format</kwd><kwd>simulation</kwd><kwd>digital integrated circuit</kwd><kwd>system on chip</kwd></kwd-group><kwd-group xml:lang="ru"><kwd>характеризация библиотек</kwd><kwd>стандартная ячейка</kwd><kwd>ячейка ввода-вывода</kwd><kwd>САПР</kwd><kwd>формат Liberty</kwd><kwd>моделирование</kwd><kwd>цифровая интегральная схема</kwd><kwd>система на кристалле</kwd></kwd-group><funding-group/></article-meta></front><body></body><back><ref-list><ref id="B1"><label>1.</label><citation-alternatives><mixed-citation xml:lang="en">Doman D. Engineering the CMOS Library: Enhancing digital design kits for competitive silicon, New Jersey, Wiley, 2012, 342 p.</mixed-citation><mixed-citation xml:lang="ru">Doman D. Engineering the CMOS Library: Enhancing digital design kits for competitive silicon. New Jersey, Wiley, 2012. 342 p.</mixed-citation></citation-alternatives></ref><ref id="B2"><label>2.</label><citation-alternatives><mixed-citation xml:lang="en">Kalashnikov V. S., Semenov M. Y. Standard cell libraries content optimization, Problems of Perspective Micro- and Nanoelectronic Systems Development — 2016. Proceedings, edited by A. Stempkovsky, Moscow, IPPM RAS, 2016, part 2, pp. 217—224 (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Калашников В. С., Семенов М. Ю. Оптимизация состава библиотек стандартных ячеек // Проблемы разработки перспективных микро- и наноэлектронных систем (МЭС). 2016. Вып. 2. С. 217—224.</mixed-citation></citation-alternatives></ref><ref id="B3"><label>3.</label><citation-alternatives><mixed-citation xml:lang="en">Pevtsov E. F., Shnyakin A. A. Analiz i issledovaniya bazy bibliotechnykh elementov, i sredstv SAPR, primenyaemykh pri poluzakaznom proektirovanii integral’nykh skhem, Fundamental’nye problem radioelektronnogo priborostroeniya, 2017, vol. 17, no. 3. pp. 836—839 (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Певцов Е. Ф., Шнякин А. А. Анализ и исследования базы библиотечных элементов, и средств САПР, применяемых при полузаказном проектировании интегральных схем // Фундаментальные проблемы радиоэлектронного приборостроения. 2017. Т. 17, № 3. С. 836—839.</mixed-citation></citation-alternatives></ref><ref id="B4"><label>4.</label><citation-alternatives><mixed-citation xml:lang="en">Zhuravlev D. V. Kharakterizatsiya tsifrovykh bibliotek: Ucheb. posobie, Voronezh, Published by FGBOU VO "Voronezhskii gosudarstvennyi tekhnicheskii universitet", 2015, 142 p. (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Журавлев Д. В. Характеризация цифровых библиотек: Учеб. пособ. Воронеж: Изд. ФГБОУ ВО "Воронежский государственный технический университет", 2015. 142 с.</mixed-citation></citation-alternatives></ref><ref id="B5"><label>5.</label><citation-alternatives><mixed-citation xml:lang="en">Liberty User Guide, vol. 1, Version 2017.06.</mixed-citation><mixed-citation xml:lang="ru">Liberty User Guide.Vol. 1, Version 2017.06.</mixed-citation></citation-alternatives></ref><ref id="B6"><label>6.</label><citation-alternatives><mixed-citation xml:lang="en">Lyalinsky A. A. Web-based automatic generation of input patterns at characterization of digital cells, Problems of Perspective Microand Nanoelectronic Systems Development—2012, Proceedings, edited by A. Stempkovsky, Moscow, IPPM RAS, 2012, pp. 95—100 (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Лялинский А. А. Автоматизированное формирование тестов при характеризации цифровых ячеек с использованием веб-доступа // Проблемы разработки перспективных микро- и наноэлектронных систем— 2012. Сб. трудов под общ. ред. академика РАН А. Л. Стемпковского. М.: ИППМ РАН, 2012. С. 95—100.</mixed-citation></citation-alternatives></ref><ref id="B7"><label>7.</label><citation-alternatives><mixed-citation xml:lang="en">Lyalinsky A. A. Parallelization in characterization of digital cells libraries, Informacionnye Tehnologii, 2020, vol. 26, no. 11, pp. 618—624 (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Лялинский А. А. Распараллеливание в процессах характеризации библиотек цифровых элементов // Информационные технологии. 2020. Т. 26, № 11. С. 618—624. DOI: 10.17587/it.26.618-624.</mixed-citation></citation-alternatives></ref><ref id="B8"><label>8.</label><mixed-citation>SiliconSmart® User Guide, Version Q-2020.03, March 2020.</mixed-citation></ref><ref id="B9"><label>9.</label><mixed-citation>Virtuoso Liberate Reference Manual, Version 13.1, May 2014.</mixed-citation></ref><ref id="B10"><label>10.</label><citation-alternatives><mixed-citation xml:lang="en">Kronos Characterizer [Electronic resource], available at: https://resources.sw.siemens.com/ru-RU/fact-sheet-kronos-characterizer (Access date: 26.09.2023).</mixed-citation><mixed-citation xml:lang="ru">Kronos Characterizer [Электронный ресурс]. URL: https://resources.sw.siemens.com/ru-RU/fact-sheet-kronos-characterizer (Дата обращения: 26.09.2023).</mixed-citation></citation-alternatives></ref><ref id="B11"><label>11.</label><citation-alternatives><mixed-citation xml:lang="en">Silvaco Viola Cell Library Characterization and Variation Modeling [Electronic resource], available at: https://silvaco.com/library-optimization/viola/ (Access date: 26.09.2023).</mixed-citation><mixed-citation xml:lang="ru">Silvaco Viola Cell Library Characterization and Variation Modeling [Электронный ресурс]. URL: https://silvaco.com/library-optimization/viola/ (Дата обращения: 26.09.2023).</mixed-citation></citation-alternatives></ref><ref id="B12"><label>12.</label><citation-alternatives><mixed-citation xml:lang="en">IEEE Standard Hardware Description Language Based on the Verilog Hardware Description Language, IEEE Std, pp. 1364—1995.</mixed-citation><mixed-citation xml:lang="ru">14. IEEE Standard Hardware Description Language Based on the Verilog Hardware Description Language. IEEE Std. 1364—1995.</mixed-citation></citation-alternatives></ref><ref id="B13"><label>13.</label><citation-alternatives><mixed-citation xml:lang="en">Official website RED SOFT [Electronic resource], available at: https://www.red-soft.ru/ (Access date: 18.03.2024).</mixed-citation><mixed-citation xml:lang="ru">Официальный веб-сайт РЕД СОФТ [Электронный ресурс]. URL: https://www.red-soft.ru/ (Дата обращения: 18.03.2024).</mixed-citation></citation-alternatives></ref><ref id="B14"><label>14.</label><citation-alternatives><mixed-citation xml:lang="en">Official website Astra Group [Electronic resource], available at: https://www.astralinux.ru/ (Access date: 18.03.2024).</mixed-citation><mixed-citation xml:lang="ru">Официальный веб-сайт "Группы Астра" [Электронный ресурс]. URL: https://www.astralinux.ru/ (Дата обращения: 18.03.2024).</mixed-citation></citation-alternatives></ref><ref id="B15"><label>15.</label><citation-alternatives><mixed-citation xml:lang="en">Official website OS Alt [Electronic resource], available at: https://www.alt-linux.ru/ (Access date: 18.03.2024).</mixed-citation><mixed-citation xml:lang="ru">Официальный веб-сайт "ОС Альт" [Электронный ресурс]. URL: https://www.alt-linux.ru/ (Дата обращения: 18.03.2024).</mixed-citation></citation-alternatives></ref><ref id="B16"><label>16.</label><citation-alternatives><mixed-citation xml:lang="en">Official website FSTEC of Russia [Electronic resource], available at: https://fstec.ru/ (Access date: 18.03.2024).</mixed-citation><mixed-citation xml:lang="ru">Официальный веб-сайт ФСТЭК России [Электронный ресурс]. URL: https://fstec.ru/ (Дата обращения: 18.03.2024).</mixed-citation></citation-alternatives></ref><ref id="B17"><label>17.</label><mixed-citation>Spectre Classic Simulator, Spectre APS, Spectre X, and Spectre XPS User Guide, Version 19.1, January 2020.</mixed-citation></ref><ref id="B18"><label>18.</label><mixed-citation>FineSim User Guide: Pro and SPICE Reference, Version P-2019.06, June 2019.</mixed-citation></ref><ref id="B19"><label>19.</label><mixed-citation>Hspice User Guide: Simulation and Analysis, Version B-2008.09, September 2008.</mixed-citation></ref><ref id="B20"><label>20.</label><mixed-citation>SymSpice User Guide, Product version 3.xx.</mixed-citation></ref><ref id="B21"><label>21.</label><citation-alternatives><mixed-citation xml:lang="en">Khvatov V. M., Garbulina T. V., Lyalinskaya O. V. Formation and Verification of Standard Element Libraries in the Design Flow for the Domestic FPGAs, Problems of Perspective Micro- and Nanoelectronic Systems Development—2018, 2018, iss. 1, pp. 57—62 (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Хватов В. М., Гарбулина Т. В., Лялинская О. В. Методы формирования и верификации библиотек стандартных элементов в составе маршрута проектирования ИС на базе ПЛИС отечественного производства // Проблемы разработки перспективных микро- и наноэлектронных систем. 2018. Вып. 1. С. 57—62. DOI: 10.31114/2078-7707-2018-1-57-62.</mixed-citation></citation-alternatives></ref><ref id="B22"><label>22.</label><citation-alternatives><mixed-citation xml:lang="en">Gavrilov S. V., Gudkova O. N., Egorov Yu. B. Methods of accelerated characterization of VLSI cell libraries with prescribed accuracy control, Russian Microelectronics, 2011, vol. 40, no. 7, pp. 476—482.</mixed-citation><mixed-citation xml:lang="ru">Gavrilov S. V., Gudkova O. N., Egorov Yu. B. Methods of accelerated characterization of VLSI cell libraries with prescribed accuracy control // Russian Microelectronics. 2011. Vol. 40, N. 7. P. 476—482.</mixed-citation></citation-alternatives></ref><ref id="B23"><label>23.</label><citation-alternatives><mixed-citation xml:lang="en">Gudkova O. N., Gavrilov S. V., Egorov Yu. B. The Method of Section Approximation for Grid Optimization for Standard Cell Library Characterization, Problems of Perspective Micro- and Nanoelectronic Systems Development—2010. Proceedings, edited by A. Stempkovsky, Moscow, IPPM RAS, 2010, pp. 120—125 (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Гудкова О. Н., Гаврилов С. В., Егоров Ю. Б. Метод аппроксимации сечений для оптимизации характеризационной сетки при проектировании библиотек элементов // Проблемы разработки перспективных микро- и наноэлектронных систем—2010. Сб. трудов под общ. ред. Академика А. Л. Стемпковского. М.: ИППМ РАН, 2010. С. 120—125.</mixed-citation></citation-alternatives></ref><ref id="B24"><label>24.</label><citation-alternatives><mixed-citation xml:lang="en">Srivastava S., Roychowdhury J. Interdependent latch setup/hold time characterization via Euler-Newton curve tracing on state-transition equations, Proceedings of the 44th annual Design Automation Conference, 2007, pp. 136—141.</mixed-citation><mixed-citation xml:lang="ru">Srivastava S., Roychowdhury J. Interdependent latch setup/hold time characterization via Euler-Newton curve tracing on state-transition equations // Proceedings of the 44th annual Design Automation Conference. 2007. P. 136—141.</mixed-citation></citation-alternatives></ref><ref id="B25"><label>25.</label><citation-alternatives><mixed-citation xml:lang="en">Charisma product website [Electronic resource], available at: https://www.radixtools.ru/products-charisma.(Access date: 18.09.2023).</mixed-citation><mixed-citation xml:lang="ru">Информация о программном продукте Charisma: [Электронный ресурс] // Производитель программного продукта харизма. URL: https://www.radixtools.ru/productscharisma (Дата обращения: 18.09.2023).</mixed-citation></citation-alternatives></ref><ref id="B26"><label>26.</label><citation-alternatives><mixed-citation xml:lang="en">Lyalinsky A. A. Web-based Characterization of Digital Libraries, Problems of Perspective Micro- and Nanoelectronic Systems Development—2020, 2020, iss. 2, pp. 29—34 (in Russian).</mixed-citation><mixed-citation xml:lang="ru">Лялинский А. А. Характеризация библиотек цифровых схем с использованием веб-технологий // Проблемы разработки перспективных микро- и наноэлектронных систем (МЭС). 2020. Вып. 2. С. 29—34. DOI: 10.31114/2078-7707-2020-2-29-34.</mixed-citation></citation-alternatives></ref><ref id="B27"><label>27.</label><citation-alternatives><mixed-citation xml:lang="en">AlphaSim User Guide, AlphaCHIP [Electronic resource], available at: http://www.alphachip.ru/doc/AlphaSim_U_G_eng.pdf (Access date: 01.12.2017).</mixed-citation><mixed-citation xml:lang="ru">AlphaSim User Guide // AlphaCHIP. [Электронный ресурс]. URL: http://www.alphachip.ru/doc/AlphaSim_U_G_eng.pdf (date of access: 01.12.2017).</mixed-citation></citation-alternatives></ref></ref-list></back></article>
