| Issue |
Title |
File |
| Vol 32, No 2 (2026) |
Effective methods of computing organization in building a domestic library characterization system for standard and I/O cells |
(Rus)
|
|
Lyalinsky A.A., Makarov G.N., Sorokin T.M.
|
| Vol 32, No 2 (2026) |
Acceleration of detailed VLSI routing using machine learning methods |
(Rus)
|
|
Stempkovsky A.L., Telpuhkov D.V., Solovyev R.A., Mkrtychan I.A., Shafeev I.I.
|
| Vol 30, No 10 (2024) |
Static Irdrop analysis using open source CAD software |
(Rus)
|
|
Demidov E.D., Stolbikov E.V.
|
| Vol 30, No 10 (2024) |
Requirements for standard and I/O cell library domestic characterization system development |
(Rus)
|
|
Makarov G.N., Sorokin T.M., Kalashnikov V.S., Semenov M.Y., Tsarapkin S.F., Gundartsev M.A.
|
| Vol 30, No 10 (2024) |
Graph and network methods for automating the design of disassembly processes for complex technical systems. Review |
(Rus)
|
|
Bozhko A.N., Chernyaev R.C.
|
| Vol 31, No 12 (2025) |
Anomaly detection and prediction in VLSI design workflows |
(Rus)
|
|
Kureichik V.V., Danilchenko V.I.
|
| Vol 31, No 10 (2025) |
Polarization of functions when minimizing of Boolean nets |
(Rus)
|
|
Bibilo P.N., Romanov V.I.
|
| Vol 31, No 4 (2025) |
Creation of a Russian import-independent system for automated design of digital integrated circuits based on the Openlane |
(Rus)
|
|
Stempkovskiy A.L., Dojdev V.S., Zablotskiy A.V., Murashev A.V., Solovyev R.A., Telpuhov D.V., Perverzev L.E., Zhukova T.D., Mkrtychan I.A., Demidov E.D.
|
| Vol 31, No 3 (2025) |
Modified signal routing algorithm in VLSI design |
(Rus)
|
|
Kureichik V.V., Danilchenko V.I., Bova V.V.
|
| Vol 31, No 3 (2025) |
Development of remote laboratory architectures for FPGA design education |
(Rus)
|
|
Amerikanov A.A., Vinarskii V.M., Evtushenko L.G., Zunin V.V., Romanova I.I.
|
| Vol 31, No 2 (2025) |
A method for implementing address translation unit for use in solid-state drive controllers |
(Rus)
|
|
Lyubavin K.D., Telpukhov D.V.
|
| Vol 30, No 9 (2024) |
Synthesis of two-block logic circuits, implementing the functions of k-valued logic |
(Rus)
|
|
Bibilo P.N.
|
| Vol 30, No 8 (2024) |
Methods for constructing high-performance interconnects in system-on-chip designs |
(Rus)
|
|
Liubavin K.D., Telpukhov D.V.
|
| Vol 30, No 5 (2024) |
Web-based digital cell library characterization system |
(Rus)
|
|
Lyalinsky A.A.
|
| Vol 30, No 2 (2024) |
A systematic approach to the search for new technical solutions for electronic equipment at the initial stages of design |
(Rus)
|
|
Yakovlev A.A., Grebennikov V.N.
|
| Vol 29, No 11 (2023) |
Joint and separate minimization of multilevel representations of boolean function systems |
(Rus)
|
|
Bibilo P.N.
|
| Vol 29, No 11 (2023) |
The method of dynamic characterization of standard cell libraries for field programmable gate arrays |
(Rus)
|
|
Khvatov V.M., Zapletina M.A.
|
| Vol 29, No 9 (2023) |
Layout quality criteria for CMOS standard cells of digital IC |
(Rus)
|
|
Kalashnikov V.S., Kerre A.L., Rozenfeld V.P., Semenov M.Y., Smirnov I.G., Sotnikov M.A., Tsarapkin S.F.
|
| Vol 29, No 2 (2023) |
Logical minimization of multilevel erpresentations of boolean function systems |
(Rus)
|
|
Bibilo P.N., Lankevich Y.Y., Romanov V.I.
|
| Vol 29, No 1 (2023) |
On the correctness of equivalent transformations in the process of functional-flow, high-level VLSI synthesis |
(Rus)
|
|
Nepomnyashchiy O.V.
|
| Vol 28, No 11 (2022) |
Formalization of geometric inter-part properties in assembling complex products |
(Rus)
|
|
Bozko A.N., Groshev S.V., Domnikov A.S.
|
| Vol 28, No 3 (2022) |
Combinatorial methods of geometric reasoning in CAD-systems. A review |
(Rus)
|
|
Bozhko A.N., Rodionov S.V.
|
| Vol 28, No 3 (2022) |
Overview of service-oriented architecture implementations for calculating the impact of external influences on all output functions of an electronic circuit |
(Rus)
|
|
Gridin V.N., Anisimov V.I., Vasilev S.A.
|
| Vol 28, No 2 (2022) |
Co-evolutionary approach to solving the problem of placing VLSI elements |
(Rus)
|
|
Lebedev O.B., Zhiglatiy A.A., Lebedeva E.O.
|
| Vol 27, No 8 (2021) |
Minimization of binary decision diagrams for systems of completely defined Boolean functions using algebraic representations of cofactors |
(Rus)
|
|
Bibilo P.N., Romanov V.I.
|
| Vol 27, No 6 (2021) |
Algebra of technological process |
(Rus)
|
|
Shchekin A.V.
|
| Vol 27, No 1 (2021) |
Automation and management of design process of the main drive for an innovative fruits and vegetables washer |
(Rus)
|
|
Bui V.P., Gavruishin S.S., Phung V.B., Dang H.M., Prokopov V.S.
|
| Vol 26, No 5 (2020) |
The control system for a group of mobile robots from the perspectives of automated designing |
(Rus)
|
|
Volosatova T.M., Kozov A.V., Tachkov A.A.
|
| Vol 25, No 11 (2019) |
Organization of parallel computing processes in distributed automation systems of circuit design |
(Rus)
|
|
Gridin V.N., Anisimov V.I.
|
| Vol 25, No 7 (2019) |
Design and technological parameterization in CAM |
(Rus)
|
|
Shchekin A.V.
|
| Vol 25, No 6 (2019) |
Index-numerical technology of data compression in automation systems of circuit design |
(Rus)
|
|
Gridin V.N., Anisimov V.I., Abuhazim M.M.
|
| Vol 24, No 12 (2018) |
Development of methods for automating resource-aware functional ECO patch generation |
(Rus)
|
|
Stempkovskiy A.L., Telpukhov D.V., Solovyev R.A., Bitkov Y.V.
|
| Vol 24, No 8 (2018) |
Methods of structural analysis of complex products in integrated CAD/CAM-systems |
(Rus)
|
|
Bozhko A.N.
|
| Vol 24, No 7 (2018) |
Minimax optimization in circuit design problems |
(Rus)
|
|
Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L.
|
| Vol 24, No 7 (2018) |
Decision-making methodology for choosing the best technical system for the recruitment of its characteristics |
(Rus)
|
|
Romanov P.S., Romanova I.P.
|
| Vol 24, No 7 (2018) |
Formalization of dimensional constraints on design decisions of the assembly stage |
(Rus)
|
|
Bozhko A.N.
|
| Vol 24, No 4 (2018) |
Information system for design enterprises |
(Rus)
|
|
Habarov V.V., Shutaleva N.S., Kostin V.I.
|
| Vol 23, No 10 (2017) |
Methods of designing of fault tolerance CMOS combinational circuits which provides automatic correction of errors |
(Rus)
|
|
Stempkovsky A.L., Gavrilov S.V., Gurov S.I., Ryzhova D.I.
|
| Vol 23, No 10 (2017) |
Decision support system development for the choice of problem-solving procedure of commutation circuit partitioning |
(Rus)
|
|
Kureichik V.M., Safronenkova I.B.
|
| Vol 23, No 10 (2017) |
Simulation of the curve and surfaces of the second order in the KOMPAS-3D system |
(Rus)
|
|
Burlov V.V., Remontova L.V., Kosolapov V.V., Kosolapova E.V.
|
| Vol 23, No 10 (2017) |
Methods for constructing client applications, circuit CAD class-based inheritance |
(Rus)
|
|
Anisimov V.I., Vasilev S.A., Zhuravlev Y.I.
|
| Vol 23, No 10 (2017) |
Processing methods of topological components in design and manufacturing of the printed circuit boards |
(Rus)
|
|
Arkhangelskiy A.N.
|
| Vol 23, No 8 (2017) |
Development of a method for identical fault search in logical circuits |
(Rus)
|
|
Telpukhov D.V., Solovyev R.A.
|
| Vol 23, No 7 (2017) |
Data models for soc specifications creation and usage |
(Rus)
|
|
Pechenko I.S., Petrov A.B.
|
| Vol 22, No 11 (2016) |
Search engine design systems cooling based engineering and physical approach |
(Rus)
|
|
Yakovlev A.A., Kamaev V.A., Sorokin V.S., Mishustina S.N.
|
| Vol 22, No 10 (2016) |
Decomposition methods analysis for digital system design debugging |
(Rus)
|
|
Ivannikov A.D.
|
| Vol 22, No 10 (2016) |
Comparative analysis of design decisions on complex of consumer properties and specifications of the object |
(Rus)
|
|
Ilyasov B.G., Gvozdev V.E., Bezhaeva O.Y., Kurunova R.R.
|
| Vol 22, No 10 (2016) |
Corporate integrated automated project management system for the construction business |
(Rus)
|
|
Kuznetsova E.V., Kravchenko T.K., Kryazhev S.A.
|
| Vol 22, No 7 (2016) |
Enchancing reliability of logic circuits with partial resynthesis method |
(Rus)
|
|
Stempkovskiy A.L., Telpukhov D.V., Solovyev R.A.
|
| Vol 22, No 6 (2016) |
Decision support system for development of technically complex manufactured goods |
(Rus)
|
|
Petrov Y.I.
|
| Vol 22, No 4 (2016) |
The creation of energy-intensive tests for combinational logic circuits according to the results of evaluation of their power consumption |
(Rus)
|
|
Bibilo P.N., Loginova I.P.
|
| Vol 22, No 4 (2016) |
UML-profile for metamodel-driven design of database applications |
(Rus)
|
|
Oleynik P.P., Gurianov V.I.
|
| Vol 22, No 3 (2016) |
Automated development of alternative technology |
(Rus)
|
|
Zagidullin R.R.
|
| Vol 22, No 2 (2016) |
Computer aided design system for photomask workspace layout generation of very large scale integrated circuit |
(Rus)
|
|
Amirkhanov A.V., Gladkikh A.A., Glushko A.A., Makarchuk V.V., Shakhnov V.A.
|
| Vol 22, No 2 (2016) |
Organization of information support of web-based circuit design CAD |
(Rus)
|
|
Gridin V.N., Anisimov V.I., Dmitrevich G.D., Laristov A.I., Al-Shameri Y.M.
|
| Vol 22, No 2 (2016) |
STA algorithms for developing self-timed schemes |
(Rus)
|
|
Surkov A.V.
|
| Vol 21, No 12 (2015) |
Test system for comparing algorithms which increases the fault tolerance of combinational circuits |
(Rus)
|
|
Stempkovskiy A.L., Telpukhov D.V., Solovyev R.A., Rukhlov V.S.
|
| Vol 21, No 12 (2015) |
Compact SPICE models of bipolar transistors and MOSFETs for automation of radiation-hardened VLSIs design |
(Rus)
|
|
Petrosyants K.O., Kharitonov I.A., Kozhukhov M.V., Sambursky L.M.
|
| Vol 21, No 11 (2015) |
Methods of noise immunity combinational blocks synthesis |
(Rus)
|
|
Gavrilov S.V., Ivanova G.A., Ryzhova D.I., Soloviev A.N., Stempkovskiy A.L.
|
| Vol 21, No 11 (2015) |
The optimal struct of urban distributing power network development with long-term city future development |
(Rus)
|
|
Kuzmina I.A.
|
| Vol 21, No 9 (2015) |
Application of circuit simulation methods for the analysis of bioelectrical processes in multicellular systems |
(Rus)
|
|
Gourary M.M., Rusakov S.G., Aliev R.R.
|
| Vol 21, No 9 (2015) |
Complex support of designing onboard control and management systems of spacecrafts on the basis of intellectual simulation model |
(Rus)
|
|
Nozhenkova L.F., Isaeva O.S., Gruzenko E.A., Vogorovskiy R.V., Koldyrev A.Y., Evsyukov A.A.
|
| Vol 21, No 9 (2015) |
Study of multi-input modular adders implemented on FPGA and VLSI by modern CAD tools |
(Rus)
|
|
Solovyev R.A., Telpukhov D.V., Rukhlov V.S., Poperechny P.S.
|
| Vol 21, No 4 (2015) |
New algorithm for perelement calculation of line structures routes |
(Rus)
|
|
Struchenkov V.I.
|
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