Email this article DEVELOPMENT AND STUDY OF THE CONTROLLER TO PATHWAYS VME
- Authors: Khvorenkov VV1, Yuminov OB1, Pivovarov VV1
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- Issue: Vol 8, No 1 (2010)
- Pages: 65-70
- Section: Articles
- URL: https://journals.eco-vector.com/2073-3909/article/view/55700
- ID: 55700
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Abstract
In this article a variant of realization of coupling controller of signal
processor ADSP-21364 on the base of PLIC with the pathways VWE is considered. The controller is realized on the base of PLIS Cyclone II family Altera - EP2C5Q208I8. Limited velocities of data exchange at maximum reliability at different operating condition are determined
processor ADSP-21364 on the base of PLIC with the pathways VWE is considered. The controller is realized on the base of PLIS Cyclone II family Altera - EP2C5Q208I8. Limited velocities of data exchange at maximum reliability at different operating condition are determined
References
- Пивоваров В.В., Юминов О.Б. Проектирование контроллера обмена данных между сигнальным процессором ADSP-21364 SHARC и магистралью микропроцессорных систем VME // Cб. докладов 5-й РНТК «Приборостроение в XXI веке. Интеграция науки, образования и производства». Ижевск, 2008. - С. 321-324.
- ГОСТ Р МЭК 821-2000. Магистраль микропроцессорных систем для обмена информацией, разрядностью от 1 до 4 байт (Магистраль VME). Госстандарт России, 2000. - 214 с.
- ADSP-2136x SHARC Processor Hardware Reference. Analog Devices, Inc. <http://www>. analog.com
- QUARTUS II handbook, Volume 1. Altera Corporation. <http://www.altera.com>
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