Development of domestic software tools for physical design and digital VLSI verification

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Lomonosov Moscow State University, as part of a cooperation headed by ISTC MIET, is developing three components of VLSI CAD: physical synthesis tool, parasitic parameters calculation tool and universal database for storing information on the IC being developed. The article discusses the tasks solved in the course of this work.

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Sobre autores

V. Sazonov

МГУ имени М.В. Ломоносова

Autor responsável pela correspondência
Email: sazonov@cosmos.msu.ru

декан факультета космических исследований, д.ф.-м.н.

Rússia

R. Erokhin

МГУ имени М.В. Ломоносова

Email: sazonov@cosmos.msu.ru

факультет космических исследований, научный сотрудник

Rússia

V. Serov

МГУ имени М.В. Ломоносова

Email: sazonov@cosmos.msu.ru

факультет космических исследований, старший программист

Rússia

M. Sheblaev

МГУ имени М.В. Ломоносова

Email: sazonov@cosmos.msu.ru

факультет космических исследований, ассистент

Rússia

Bibliografia

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2. Fig. 1. Cell placement using the analytical method [16]

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3. Fig. 2. Legalization of cells [16]

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4. Fig. 3. Applying the rip-up-and-re-route methodology to the conflict (b, c) and creating a correct trace (a, b, c) [18]

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5. Fig. 4. Capacitances of extended conductors

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6. Fig. 5. Examples of two-dimensional templates

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7. Fig. 6. Capacities that cannot be taken into account using two-dimensional templates

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8. Fig. 7. Design route without UBD

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9. Fig. 8. Design route with UBD

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Declaração de direitos autorais © Sazonov V., Erokhin R., Serov V., Sheblaev M., 2025