Development of workspace and algorithms for testing SpaceWire onboard equipment

Мұқаба

Дәйексөз келтіру

Толық мәтін

Аннотация

For a long time, the foreign space industry has been using one of the most advanced and actively developing technologies for transmitting information on board a spacecraftSpaceWire. This technology provides high-speed transmission of large amounts of information, creation of a unified infrastructure for high-speed data processing to connect sensors, data processing system elements and mass memory blocks. In SpaceWire is gradually being introduced and used on promising spacecraft. To verify the compliance of the onboard equipment of such devices with the requirements of the SpaceWire ECSS-E-ST-5012C Rev.1 standard, there is a need to develop a workplace described in this article. The workplace is designed so that SpaceWire onboard equipment can be connected to it and tests can be run that check certain parameters of information exchange regulated by the standard. The article presents the general structure of the workplace, as well as a description of each of its elements separately, together with a description of their functionality. The article also describes the developed testing algorithms. Among them, it is possible to distinguish a check for the compliance of the bit error coefficient with the required value, a check for the support of the header removal method by SpaceWire switches, as well as a check for compliance with the requirements for the RMAP and STP-ISS transport protocols. The algorithms of these tests are presented in the form of flowcharts and a detailed text description. The tests themselves are implemented in the form of program code in the C language. As a confirmation of the correctness of the developed tests, practical testing of SpaceWire devices was carried out, among which two payload boards for the NORBY spacecraft can be distinguished, as well as an ultra-large integrated circuit 1931KH014 of a programmable switch for SpaceWire networks. A brief description of the testing devices used in the work is given in the form of a presentation of their functionality applicable to the testing workplace being developed.

Авторлар туралы

Andrey Maksyutin

JSC Academician M. F. Reshetnev Information Satellite Systems; Reshetnev Siberian State University of Science and Technology

Хат алмасуға жауапты Автор.
Email: ellis1998@yandex.ru

Engineer, postgraduate student of the Department of Information and Control Systems

Ресей, 52, Lenin St., Zheleznogorsk, Krasnoyarsk region, 662972; 31, Krasnoyarskii rabochii prospekt, Krasnoyarsk, 660037 2

Alexander Murygin

Reshetnev Siberian State University of Science and Technology

Email: avm514@mail.ru

Dr. Sc., Professor

Ресей, 31, Krasnoyarskii rabochii prospekt, Krasnoyarsk, 660037

Denis Ivlenkov

JSC Academician M. F. Reshetnev “Information Satellite Systems”

Email: ivlenkovdv@iss-reshetnev.ru

Engineer

Ресей, 52, Lenin St., Zheleznogorsk, Krasnoyarsk region, 662972

Dmitry Dymov

JSC Academician M. F. Reshetnev “Information Satellite Systems”

Email: dymov@iss-reshetnev.ru

Head of the Basic System Design Center for Onboard Spacecraft Equipment

Ресей, 52, Lenin St., Zheleznogorsk, Krasnoyarsk region, 662972

Әдебиет тізімі

  1. GOST R 52070–2003. Interfejs magistral’nyj posledovatel’nyj sistemy jelektronnyh modulej [State Standard R 52070-2003. The interface is a backbone serial system of electronic modules]. Moscow, Standardtinform, 2003. 3 p.
  2. Gorbunov S. F., Grishin V. Yu., Eremeev P. M. [Network interfaces of spacecraft: prospects of development and problems of implementation]. Nanoindustriya. 2019, No. 89, P. 128–130 (In Russ.).
  3. Nozhenkova L. F., Isaeva O. S., Gruzenko E. A. [Method of system modeling of onboard spacecraft equipment]. Computing technologies. 2015, No. 3, P. 33–45 (In Russ.).
  4. Parkes S., Armbruster P. SpaceWire: A spacecraft onboard network for real-time communications. Available at: https://www.researchgate.net/publication/4196676_SpaceWire_A_spacecraft_ onboard_network_for_real-time_communications (accessed: 15.07.2021).
  5. ECSS-E-50-11 Draft F. Remote memory access protocol (normative). Available at: http://spacewire.esa.int/content/Standard/documents/SpaceWire%20RMAP%20Protocol%20Draft%20 F%204th%20Dec%202006.pdf (accessed: 20.07.2021).
  6. Sheinin Yu. E., Olenev V. L., Lavrovskaya I. Ya. et al. [Development, analysis and design of the STP-ISS transport protocol for SpaceWire onboard space networks]. Izvestiya samarskogo nauchnogo centra rossiyskoy akademii nauk. 2014, No. 6–2, P. 632–639 (In Russ.).
  7. User manual for the 4Links Diagnostic SpaceWire. Interface Available at: https://4links.co.uk/ application/files/2615/9136/0012/User_Manual_DSI.pdf (accessed: 04.09.2021).
  8. Osobennosti izmereniya parametrov kanalov s cifrovoy moduljaciey [Features of measuring the parameters of channels with digital modulation] (In Russ). Available at: https://mediasputnik.net/osobennosti-izmereniya-parametrov-kanalov-s-czifrovoj-modulyacziej-3 (accessed: 12.09.2021).
  9. Vvedenie petlevogo kabelya [Introduction of loop cable]. (In Russ). Available at: http://ru fibresplitter.com/news/introduction-of-loopback-cable-24290794.html (accessed: 20.10.2021).
  10. Rossiyskie IP-yadra standarta SpaceWire [Russian IP cores of the SpaceWire standard]. (In Russ). Available at: https://kit-e.ru/fpga/rossijskie-ip-yadra-standarta-spacewire-2/ (accessed: 25.09.2021).
  11. Logicheskaya adresaciya [Logical addressing] (In Russ). Available at: http://osnovy- setei.ru/logicheskaya-adresaciya.html (accessed: 01.10.2021).
  12. Solokhina T., Petrichkovich Ya., Sheinin Yu. [SpaceWire technology for parallel systems and on-board distribution complexes]. Jelektronika: nauka, tehnologija, biznes. 2007, No. 1, P. 38–49. (In Russ.)
  13. Razlichiya mezhdu polnodupleksnym i poludupleksnym rezhimami svyazi [Differences between full-duplex and half-duplex communication modes] (In Russ.). Available at: https://itigic.com/ru/differences-between-full-duplex-and-half-duplex / (accessed: 29.10.2021).
  14. Rukovodstvo po ekspluatacii DVUK.431433.061-003RE1. Skhemy integral’nye 1931KKH014 [Operating manual DVUK.431433.061-003RE1. Integrated circuits 1931KH014]. 2020. (In Russ).
  15. Programmiruemye logicheskie integral’nye skhemy – PLIS [Programmable logic integrated circuits – FPGA] (In Russ.). Available at: https://digteh.ru/digital/PLD/ (accessed: 06.11.2021).

Қосымша файлдар

Қосымша файлдар
Әрекет
1. JATS XML

© Maksyutin A.S., Murygin A.V., Ivlenkov D.V., Dymov D.V., 2021

Creative Commons License
Бұл мақала лицензия бойынша қолжетімді Creative Commons Attribution 4.0 International License.

Осы сайт cookie-файлдарды пайдаланады

Біздің сайтты пайдалануды жалғастыра отырып, сіз сайттың дұрыс жұмыс істеуін қамтамасыз ететін cookie файлдарын өңдеуге келісім бересіз.< / br>< / br>cookie файлдары туралы< / a>