Enviar artigo por via de e-mail Designing finite-state machine in Matlab / Simulink system’s Stateflow tool with subsequent implementation at the FPGA basis
- Autores: Strogonov А.1
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Afiliações:
- Воронежский государственный технический университет
- Edição: Nº 3 (2023)
- Páginas: 134-147
- Seção: CAD / CAE
- URL: https://journals.eco-vector.com/1992-4178/article/view/629362
- DOI: https://doi.org/10.22184/1992-4178.2023.224.3.134.146
- ID: 629362
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The article describes an example of designing finite-state machine in Stateflow tool of Matlab/Simulink visual simulation system with subsequent HDL code generation.
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Sobre autores
А. Strogonov
Воронежский государственный технический университет
Autor responsável pela correspondência
Email: andreistrogonov@mail.ru
профессор кафедры полупроводниковой электроники и наноэлектроники
RússiaBibliografia
- Knapp S. K. Accelerate FPGA macros with one-hot approach // ED, 1990, no. 17, pp. 65–71.
- Строгонов А. В. Проектирование конечных автоматов по методу OHE // Компоненты и технологии. 2007. № 10. С. 124–129.
- Строгонов А. В., Быстрицкий А. В. Эффективность разработки конечных автоматов в базисе ПЛИС FPGA // Компоненты и технологии. 2013. № 1. С. 66–72.
- Строгонов А. В. Проектирование цифровых автоматов с использованием системы Matlab/Simulink // Компоненты и технологии. 2008. № 4. С. 149–152.
- Строгонов А. В., Цыбин С. А., Городков П. С. Проектирование конечных автоматов с использованием пакетов расширения Stateflow и Xilinx System Generator системы Matlab/Simulink // Компоненты и технологии. 2015. № 8. С. 120–127.
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Fig. 1. Graph automaton from work [1]
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Fig. 2. Simulation model for three automata: a – Moore automaton with trigger input; b – Moore machine without trigger input; c – Mealy machine with trigger input
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Fig. 3. Moore graph automaton with trigger input in the Stateflow application of the Matlab/Simulink system
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Fig. 4. Mealy graph automaton with trigger input in the Stateflow application of the Matlab/Simulink system
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Fig. 5. Input signals (a) and simulation results: b – for a Moore machine with a trigger input; c – for a Moore machine without a trigger input; g – for a Mili machine with a trigger input
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Fig. 6. Модель автомата Мура, подготовленная для извлечения VHDL-кода с триггерным входом (с входным событием переключения Data)
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Fig. 7. Package with enumerated data type, generated automatically
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Fig. 8. Moore machine design with trigger input Data in Quartus II CAD, generated automatically using Simulink HDL Coder
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Fig. 9. Results of finite state machine synthesis in Quartus II CAD system using VHDL code generated using Simulink HDL Coder: a – RTL representation; b – optimized state diagram; c – conditions for state transitions; d – transition table demonstrating the use of the OHE method
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Fig. 10. Timing diagram of a Moore state machine with a Data trigger input (state transitions 1, 2, 4, 5, 6, 7, and 1 shown)
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Fig. 11. Timing diagram of a Moore state machine with a Data trigger input (state transitions 1, 4, 5, 6, 7, and 1 shown)
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Fig. 12. RTL representation of two automata in Quartus II CAD: a – the automaton is built using VHDL code obtained using Simulink HDL Coder from a Moore automaton without a trigger input; b – the machine is built using VHDL code obtained using the built-in state editor of the Quartus II CAD system
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Fig. 13. Automata graph developed using the state editor in Quartus II CAD
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Fig. 14. Timing diagrams of the operation of two machines (transitions in states 1, 4, 5, 6, 7 and 1 are shown)
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Fig. 15. Fragments of VHDL codes: a – generated using Simulink HDL Coder from a Moore machine without a trigger input; b – generated using the built-in CAD state editor Quartus II
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