Simulation of Si–sio2 interface depassivation in LDMOS transistor structure using Sentaurus TCAD

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详细

The article discusses methods for predicting the degradation processes of LDMOS transistors during operation under various temperature conditions. Simulation of an LDMOS transistor in Sentaurus TCAD showed that changing temperature conditions
leads to different rates of degradation of transistor characteristics, such as threshold voltage and leakage current.

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作者简介

R. Alekseev

АО «НИИЭТ»

编辑信件的主要联系方式.
Email: redactor@electronics.ru

ведущий инженер

俄罗斯联邦

V. Maltsev

АО «НИИЭТ»

Email: redactor@electronics.ru

инженер-технолог 3 категории

俄罗斯联邦

参考

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2. Fig. 1. Fragment of the LDMOS transistor structure model, designed using Process

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3. Fig. 2. Transient response before and after 720 hours of testing

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4. Fig. 3. Fragment of the transition characteristic before the tests and after 1, 4, 8, 24 and 720 hours of testing

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5. Fig. 4. Dependence of the concentration of interband traps at the boundary of the gate dielectric on the test time

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6. Fig. 5. Dependence of the concentration of interface traps on the test time and temperature

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7. Fig. 6. Dependence of the transition characteristic on temperature

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