Email this article Some aspects of the development of IC testing and verification methodologies
- Authors: Makushin M.1
-
Affiliations:
- НОБ «Военные науки и оборонная промышленность» БРЭ
- Issue: No 8 (2025)
- Pages: 30-40
- Section: Test and measurement
- URL: https://journals.eco-vector.com/1992-4178/article/view/695959
- DOI: https://doi.org/10.22184/1992-4178.2025.250.8.30.40
- ID: 695959
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Abstract
With the adoption of ever smaller design rules, the increasing use of 3D designs and heterogenous (with diverse design rules and functionality) multi-chip/multi-chiplet modules, the need for new verification methods arises.
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About the authors
M. Makushin
НОБ «Военные науки и оборонная промышленность» БРЭ
Author for correspondence.
Email: journal@electronics.ru
ведущий научный редактор
Russian FederationReferences
- Bailey B. Improving Verification Methodologies // Semiconductor Engineering. 2025. February 27ʰᵗ.
- Peters L. Making The Most of Test Resources // Semiconductor Engineering. 2025. September 9ʰᵗ.
- Foster H. How AI And Connected Workflows Will Close The Verification Bottleneck // Semiconductor Engineering. 2025. March 27ʰᵗ.
- Peters L. Automation And AI Improve Failure Analysis // Semiconductor Engineering. 2025. March 11ʰᵗ.
- Haley G. E-Beam Inspection Proves Essential For Advanced Nodes // Semiconductor Engineering. 2025. May 8ʰᵗ.
Supplementary files
Supplementary Files
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Fig. 1. Errors identified at each stage of development.
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Fig. 2. The number of successful IS creation projects is declining.
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Fig. 3. Locations of hidden defects on the wafer, detected by electron beam inspection tools with a resolution of 5 nm.
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