Some aspects of the development of IC testing and verification methodologies
- 作者: Makushin M.1
-
隶属关系:
- НОБ «Военные науки и оборонная промышленность» БРЭ
- 期: 编号 8 (2025)
- 页面: 30-40
- 栏目: Test and measurement
- URL: https://journals.eco-vector.com/1992-4178/article/view/695959
- DOI: https://doi.org/10.22184/1992-4178.2025.250.8.30.40
- ID: 695959
如何引用文章
详细
With the adoption of ever smaller design rules, the increasing use of 3D designs and heterogenous (with diverse design rules and functionality) multi-chip/multi-chiplet modules, the need for new verification methods arises.
全文:
作者简介
M. Makushin
НОБ «Военные науки и оборонная промышленность» БРЭ
编辑信件的主要联系方式.
Email: journal@electronics.ru
ведущий научный редактор
俄罗斯联邦参考
- Bailey B. Improving Verification Methodologies // Semiconductor Engineering. 2025. February 27ʰᵗ.
- Peters L. Making The Most of Test Resources // Semiconductor Engineering. 2025. September 9ʰᵗ.
- Foster H. How AI And Connected Workflows Will Close The Verification Bottleneck // Semiconductor Engineering. 2025. March 27ʰᵗ.
- Peters L. Automation And AI Improve Failure Analysis // Semiconductor Engineering. 2025. March 11ʰᵗ.
- Haley G. E-Beam Inspection Proves Essential For Advanced Nodes // Semiconductor Engineering. 2025. May 8ʰᵗ.
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