Integration of a three-layer stack: the future of smart imaging devices

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Abstract

This article describes HD TSV and hybrid bonding technologies that enable the integration of various components for sensors and imaging systems. Optimization of the thinning process and reduction of the TSV aspect ratio eliminated electrical leakage and significantly improved TSV performance.

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About the authors

D. Sukhanov

ООО «Остек-ЭК»

Author for correspondence.
Email: micro@ostec-group.ru

заместитель технического директора

Russian Federation

References

  1. Borel S., Nicolas S. Achieving 3-layer stacking integration for future smart imagers // Chip Scale Review. 2024. July-August.

Supplementary files

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1. JATS XML
2. Fig. 1. Illustration of a three-layer intelligent imaging device: layer 1 is a pixel array (photodiode), layer 2 is an A/D signal processing device, layer 3 is an artificial intelligence (AI) device

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3. Fig. 2. Schematic illustration of a 1L TV used to achieve the required characteristics of the HD TSV

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4. Fig. 3. Top view and cross-sectional SEM images of a 1L HD TSV with a size of 1 x 10 μm: a – dense medium (chain with a pitch of 2 μm), b – isolated region

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5. Fig. 4. Cross-sectional FIB-SEM image of a 2L TV: the pad pitch is 6 μm, and the dimensions of the HD TSV are 1 x 10 μm

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6. Fig. 5. FIB-SEM 3D cross-section of 3L TV structure: pad pitch is 6 μm, HD TSV dimensions are 1 × 10 μm

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7. Fig. 6. Cumulative percentage resistance of half-links of 3L TV series circuit with 6 μm pitch and 1 × 10 μm HD TSV

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8. Fig. 7. SEM micrographs of 1 × 6 μm HD TSV cross-section in 1L architecture: a – general view in dense region (2 μm pitch), b – enlarged image of HD TSV top, c – enlarged image of HD TSV base

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9. Fig. 8. SEM micrographs of the cross-section of a 1 × 6 μm HD TSV in 2L architecture: a – general view in the dense region (4 μm step), b – enlarged image of the base of the HD TSV, c – enlarged image of the top of the HD TSV

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Copyright (c) 2025 Sukhanov D.